Wikipedia and famous book called B. Razavi, Design of Analog CMOS Integrated Circuits are my favorite references for PLL.
Q1. Can you draw Block level diagram of a PLL?
Q2. Why do we need a divider in a PLL feedback loop?
Q3. How does a feedback divider look like? How was the circuitry of the divider? What type of divider was it?
Q5. What was the frequency of the divider you worked on?
Q6. What is a VCO? What kind of VCO was used in the PLL and do you know the reason why?
Q7. While simulating PLL with a Fast SPICE simulator - Nanosim/Ultrasim/Finesim what challenges did you face and how did you deal with that?
[Hint] High Frequency of the system and the LPF.
Q8. What settings in general you take care in the config file while simulating a PLL with Fast SPICE simulation tool?
[Hint] Accuracy of the VCO and the resolution of time.
